/*-------------------------------------------------------------------------
   Copyright (C) 2010 One Laptop per Child

   This program is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published by the
   Free Software Foundation; either version 2, or (at your option) any
   later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.

   In other words, you are welcome to use, share and improve this program.
   You are forbidden to forbid anyone else to use, share and improve
   what you give them.   Help stamp out software-hoarding!

   As a special exception, you may use this file as part of a free software
   library for the XO of the One Laptop per Child project without restriction.
   Specifically, if other files instantiate
   templates or use macros or inline functions from this file, or you compile
   this file and link it with other files to produce an executable, this
   file does not by itself cause the resulting executable to be covered by
   the GNU General Public License.  This exception does not however
   invalidate any other reasons why the executable file might be covered by
   the GNU General Public License.
-------------------------------------------------------------------------*/

#define mv_to_gauge(g)			(int)( g * 100L * 16L / 488L )
#define degc_to_guage(degC)		(int)(degC * 1000L * 32L / 127L)
#define ma_to_guage_Ib(mA)		(int)(((mA * 120000L)+5000L) / 15625L)

/* DS2756 Memory Map */
//battery gauge
#define DS_SPEC_FEA												0x08
#define DS_VOLT_MSB                             				0x0C
#define DS_VOLT_LSB                             				0x0D
#define DS_CURT_MSB                             				0x0E
#define DS_CURT_LSB                             				0x0F
#define DS_ACR_MSB                              				0x10
#define DS_ACR_LSB                              				0x11
#define DS_TEMP_MSB                             				0x18
#define DS_TEMP_LSB                             				0x19

// Bank 0
#define DS_DCR_CTR_MSB                                          0x20
#define DS_DCR_CTR_LSB                                          0x21
#define DS_BAT_AGE_MSB                                          0x22
#define DS_BAT_AGE_LSB                                          0x23
#define DS_V10_CTR                        		                0x24
#define DS_BAT_MISC_FLAG                                        0x25
#define DS_FAC_25_MSB                                          	0x26
#define DS_FAC_25_LSB                                          	0x27
#define DS_BAT_SOC_r                                           	0x28
#define DS_BAT_Ri_MSB                                          	0x29
#define DS_BAT_Ri_LSB                                       	0x2A
#define DS_BAT_Old_Ri_MSB                                       0x2B
#define DS_BAT_Old_Ri_LSB                                       0x2C

/* new define for NiMH battery to check storage leakage */
#define DS_LAST_DISC_SOC                                        0x2D
#define DS_LAST_DISC_ACR_MSB                                    0x2E
#define DS_LAST_DISC_ACR_LSB                                    0x2F

#define DS_VALID_DISC_CYCLE                                     0x30
#define DS_PACK_INFO                                            0x31
#define DS_MILD_EQ_CTR                                          0x32
#define DS_ACC_BIAS                                            	0x33
#define DS_DISCHARGE_THRESHOLD          						0x34
#define DS_CHARGE_THRESHOLD                     				0x35
#define DS_EQ_STORE_MSB                                         0x36
#define DS_EQ_STORE_LSB                                         0x37
#define DS_LM_AGE_MSB                                          	0x38
#define DS_LM_AGE_LSB                                          	0x39
//#define DS_LM_CON_CTR                                       	0x3A
#define DS_FAC_DIFF_MSB                                         0x3B
#define DS_FAC_DIFF_LSB                                         0x3C
#define DS_FAC_ERR                                             	0x3D
#define DS_DTdt_CON_CTR                                         0x3E
#define DS_Ri_ERR_CON_CTR                                       0x3F

// Bank 1
#define DS_MAXV_CTR_MSB                                         0x40
#define DS_MAXV_CTR_LSB                                         0x41
#define DS_NDV_CTR_MSB                                          0x42
#define DS_NDV_CTR_LSB                                          0x43
#define DS_MAXT_CTR_MSB                                         0x44
#define DS_MAXT_CTR_LSB                                         0x45
#define DS_DTdt_CTR_MSB                                         0x46
#define DS_DTdt_CTR_LSB                                         0x47
#define DS_FULL_EQ_CTR                                          0x48
#define DS_LV_CTR_MSB                                       	0x49
#define DS_LV_CTR_LSB                                       	0x4A
#define DS_LOW_SOC_CTR_MSB                              		0x4B
#define DS_LOW_SOC_CTR_LSB                              		0x4C
#define DS_STORAGE_ABUSE_CTR_MSB        						0x4D
#define DS_STORAGE_ABUSE_CTR_LSB        						0x4E
#define DS_UPPER_85_CTR_MSB                             		0x4F
#define DS_UPPER_85_CTR_LSB                             		0x50
#define DS_LOWER_85_CTR_MSB                             		0x51
#define DS_LOWER_85_CTR_LSB                             		0x52
#define DS_Ri_OUT_RANGE_CTR_MSB         						0x53
#define DS_Ri_OUT_RANGE_CTR_LSB         						0x54
#define DS_FAC_5_LOWER_CTR_MSB          						0x55
#define DS_FAC_5_LOWER_CTR_LSB          						0x56
#define DS_LM_CTR_MSB                                          	0x57
#define DS_LM_CTR_LSB                                          	0x58
#define DS_CHG_FAULT_CTR_MSB                    				0x59
#define DS_CHG_FAULT_CTR_LSB                    				0x5A
#define DS_BAT_TEMP_OFFSET                              		0x5B
#define DS_MAX_NUM_CON_DAY                              		0x5C
#define DS_EQ_AGE_MSB                                       	0x5D
#define DS_EQ_AGE_LSB                                         	0x5E
#define DS_BAT_INFO                                           	0x5F

// Bank 2
#define DS_BAT_SERIAL_NUM_1                             		0x60
#define DS_BAT_SERIAL_NUM_2                            	 		0x61
#define DS_BAT_SERIAL_NUM_3                             		0x62
#define DS_BAT_SERIAL_NUM_4                             		0x63
#define DS_BAT_SERIAL_NUM_5                             		0x64

#define DS_BAT_REMAIN_ACR_MSB                           		0x68
#define DS_BAT_REMAIN_ACR_LSB                           		0x69
#define DS_BAT_CHARGE_MSB                               		0x6A
#define DS_BAT_CHARGE_LSB                               		0x6B
#define DS_BAT_CHARGE_SOC                               		0x6C
#define DS_BAT_DISCHARGE_MSB                            		0x6D
#define DS_BAT_DISCHARGE_LSB                            		0x6E
#define DS_BAT_DISCHARGE_SOC                            		0x6F

#define EEPROM_W_MSB                                    		0x70
#define EEPROM_W_LSB                                    		0x71

#define DS_BAT_REINIT_INFO										0x72		// +++ DAVID +++ 2007, for re-initial memory
// 0x66 -> NIMH
// 0x55 -> LIFE
#define DS_BAT_REINIT_RECORD									0x73		// +++ DAVID +++ 2007, for re-initial memory

#define DS_BAT_RM_BK_ACR_MSB                            		0x78
#define DS_BAT_RM_BK_ACR_LSB                            		0x79

#define DS_BAT_NET_ADDRESS										0x80

